Department of Computer Science, University of Crete, Greece

CS-534: Packet Switch Architecture

Spring 2008
Manolis Katevenis

Bibliography.

Course Description [PDF] - log of lecture dates and topics.

Lecture Notes, Transparencies, Exercises:

This Year:

Chapter 1: Basic Concepts and Queueing Architectures

[Slides in PDF] [Slides Handout in PDF]
Exercises 1 (due 27 Feb.-wk.2.2): Internal Blocking, Q'ing Arch. Throughput [HTML] [PDF]
[Older text for a portion of the above material: [Text in HTML] [Text in PDF] ]
[in 2006 and earlier, there has been a section on "Technology Outlook"]

Chapter 2: Link and Memory Architectures and Technology

2.1 Links, Throughput/Buffering, Multi-Access Overheads [Slides in PDF] [Slides Handout in PDF]
[reminder for 09a: possibly move "cut-through" from 3.1 to 2.1; Older text for section 2.1.1: [Text in HTML] [Text in PDF] ]
Exercises 2 (due 5 Mar.- wk.3.2): Transmission Rate and Throughput, Turn-Around Overhead [HTML] [PDF]
2.2 Memory Technologies: On-chip / Off-chip SRAM, DRAM [Slides in PDF] [Slides Handout in PDF]
Exercises 3 (due 14 Mar.- wk.4.2): Memory Access Rate, Variable-Size-Packet Segmentation [HTML] [PDF]
2.A Appendix: Elastic Buffers for Cross-Clock Communication [Slides in PDF] [Slides Handout in PDF]

Chapter 3: Time Switching, Multi-Queue Memories, Shared Buffers, Output Queueing Family

3.1 Time Division Multiplexing (TDM), Time Switching, Cut-Through [Slides in PDF] [Slides Handout in PDF]
Exercises 4 (due 19 Mar.- wk.5.2): Switch Generations, Cut-Through [HTML] [PDF]
3.2 Wide Memories for High Throughput, Segmentation Overhead [Slides in PDF] [Slides Handout in PDF]
[animation of the operation of the pipelined memory]
3.3, 3.4 Multiple Queues within a Buffer Memory, Queueing for Multicast Traffic [Slides in PDF] [Slides Handout in PDF]
[animated PPT for queue operations with free-block preallocation]
Exercises 5 (due 26 Mar. (2/4)- wk.6.2): Linked-List Queue Management [HTML] [PDF]
3.5 Shared Buffering and the Output Queueing Family [Slides in PDF] [Slides Handout in PDF]
Exercises 6 (due 2 Apr.- wk.7.2): Multi-Packet Queue Blocks, Multicast Queues [HTML] [PDF]

Exercises 7 (old 8) (due (9/4) 7/5 - wk.(8) 10): Input Queueing and Crossbar Scheduling [HTML] [PDF]

Exercises 8 (old 10) (due (16/4) 7/5 - wk.(9) 10): Queueing Architecture SRAM Cost [HTML] [PDF]

Exercises 9 (old 6) (due (7/5) 12/5 - wk.(10) 11): TST and Clos Circuit Switch Scheduling [HTML] [PDF]

Exercises 10 (old 11) (due 21 May - wk.(10-11) 12): Switching Fabric Topologies [HTML] [PDF]

Exercises 11 (old 12) (due 4 June - wk.F): Flow control, per-flow queueing [HTML] [PDF]

Exercises 12(old 13) (due 9 June - wk.F): Output Scheduling for QoS [HTML] [PDF]

Previous Year (Spring 2007)

ACACES 2007 (Third International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems) Slides for the course on "Queue and Flow Control Architectures for Interconnection Switches", by Manolis Katevenis, in PDF:

[Slides] [Handouts] Crossbars, Scheduling, and Combination Queueing
[Slides] [Handouts] Flow and Congestion Control in Switching Fabrics

Chapter 4: Time-Space Switching and Input Queueing Architectures

4.1 The Crossbar and Time-Space-Time Circuit Switching [Slides - PDF] [Slides Handout - PDF]
4.2 Single-Queue Input Queueing [Slides - PDF] [Slides Handout - PDF]
4.3 VOQ Input Queueing and Crossbar Scheduling [Slides - PDF] [Slides Handout - PDF]
4.4 Internal Speedup (CIOQ) and Related Topics [Slides - PDF] [Slides Handout - PDF]

Older Year (Spring 2006):

Chapter 5: Switching Fabrics, Inverse Multiplexing

5.1 Byte Slicing, Inverse Multiplexing [Slides - PDF] [Slides Handout - PDF]
5.2 Switching Fabric Topologies [Slides - PDF] [Slides Handout - PDF]
5.3 Scalable Switches [Slides - PDF] [Slides Handout - PDF]
Exercises 9 (due 10 Apr.-wk.9.1): Internal Blocking in Switching Fabrics [HTML] [PDF]

Chapter 6: Flow Control in Buffered Switching Fabrics

6.1 Credit-Based Flow Control (Backpressure) [Slides - PDF] [Slides Handout - PDF]
6.2 Per-Flow Queueing and Flow Control [Slides - PDF] [Slides Handout - PDF]
6.3 Buffer Space versus Number of Flows [Slides - PDF] [Slides Handout - PDF]

Chapter 7: Output Scheduling for Quality-of-Service (QoS) Guarantees

7.1 Output Scheduling for QoS [Slides - PDF] [Slides Handout - PDF]

Other Topics: Please refer to the bibliography pointed below (2003 and older)

Routing Table Lookup and Flow Classification Hardware [references]
Cluster, Storage, System, and smaller Area Networks [references]
Network Processors [references]
Optical Switching [references]

Previous Years:

Spring 2007

Spring 2006

Spring 2005 (last year with slides in HTML - GIF - JPEG format)

Previous Years Home Pages: Sp. 2004 - Sp. 2003 - Fall 2001 - Sp. 2000 and older.