In Computer Architecture, we design the compute, communication, and memory subsystems of modern infrastructures –Datacenters and High Performance Computers (HPC)– to achieve the highest possible performance at low cost and at the best possible energy efficiency given the properties of the microelectronic circuits out of which we build them. We work in tight collaboration with the CARV Laboratory of FORTH-ICS, within the European Processor and the European HPC Research Programme, where Greece, with central contributions by our group, is among the leading countries. We also collaborate with industry and promote entrepreneurship and commercialization of novel research outcomes.

We have made pioneering contributions in Interconnection Networks and Interprocessor Communication, with a long history of more than four decades that also includes Reduced Instruction Set Computer (RISC) architectures, where now we actively contribute through RISC-V International.

Our current work and interests also include memory hierarchies (caching, coherence, consistency) for manycore, vector, and parallel systems, accelerators and graphics processor units (GPU), high-throughput and low-latency interconnects (switches, network interfaces), and power-efficient servers.  We emphasize research that goes hand-in-hand with building real, working, innovative prototypes, using field-programmable gate-array (FPGA) and integrated circuit (VLSI ASIC) technologies, co-designing our hardware with the systems and parallel software and applications that run on it.

• Vassilis Papaefstathiou